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IRDC3842A
SupIRBuck
DESCRIPTION
TM
USER GUIDE FOR IR3842A EVALUATION BOARD
Double Sided PCB
The IR3842A is a synchronous buck converter, providing a compact, high performance and flexible solution in a small 5mmx6mm Power QFN package. Key features offered by the IR3842A include programmable soft-start ramp, precision 0.7V reference voltage, Power Good, thermal protection, programmable switching frequency, Sequence input, Enable input, input under-voltage lockout for proper startup, and pre-bias start-up.
An output over-current protection function is implemented by sensing the voltage developed across the on-resistance of the synchronous rectifier MOSFET for optimum cost and performance. This user guide contains the schematic and bill of materials for the IR3842A evaluation board. The guide describes operation and use of the evaluation board itself. Detailed application information for IR3842A is available in the IR3842A data sheet.
BOARD FEATURES * Vin = +12V (13.2V Max) * Vcc=+5V (5.5V Max) * Vout = +1.8V @ 0- 6A * Fs=600kHz * L= 1.0uH * Cin= 2x10uF (ceramic 1206) * Cout= 4x22uF (ceramic 0805)
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IRDC3842A
CONNECTIONS and OPERATING INSTRUCTIONS
A well regulated +12V input supply should be connected to VIN+ and VIN-. A maximum 6A load should be connected to VOUT+ and VOUT-. The connection diagram is shown in Fig. 1 and inputs and outputs of the board are listed in Table I. IR3842A has two input supplies, one for biasing (Vcc) and the other as input voltage (Vin). Separate supplies should be applied to these inputs. Vcc input should be a well regulated 4.5V-5.5V supply and it would be connected to Vcc+ and Vcc-.
Table I. Connections
Connection VIN+ VINVcc+ VccVOUTVOUT+ Enable Seq. PGood Signal Name Vin (+12V) Ground of Vin Vcc input Ground for Vcc input Ground of Vout Vout (+1.8V) Enable Sequence Input Power Good Signal
LAYOUT
The PCB is a 4-layer board. All of layers are 2 Oz. copper. It is a double sided board with components mounted on both sides. Power supply decoupling capacitors, the Bootstrap capacitor and feedback components are located close to IR3842A. The feedback resistors are connected to the output voltage at the point of regulation and are located close to the SupIRBuck. To improve efficiency, the circuit board is designed to minimize the length of the on-board power ground current path.
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IRDC3842A
Connection Diagram
Vin
GND
Enable Seq AGND PGood SS Vcc GND Vo GND TOP SIDE
BOTTOM SIDE
Fig. 1: Connection diagram of IR384xA evaluation board
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IRDC3842A
Fig. 2: Board layout, top overlay
Fig. 3: Board layout, bottom overlay (rear view)
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IRDC3842A
Fig. 4: Board layout, mid-layer I.
Fig. 5: Board layout, mid-layer II.
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1
1
14
2.0K 1 Boot seq Vin 12 FB COMP AGnd1 L1 1uH 10 Rt SS Vcc PGnd OCset 9 8 15 VCC C13 1uF R12 2.67K Enable 2 GND 3 4 SW 5 SS 6 PGood AGnd2 7 R9 23.7K 0.1uF C10 1 1
10nF
U1
13
1
1
1
1
4.99K R3 3.16k A
20
B
IRDC3842A
Fig. 6: Schematic of the IR3842A evaluation board
1
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Enable Vin (+12V) R18 1 49.9K C7 0.1uF C3 10uF C2 10uF Vin1 R19 7.5K Vin+
VCC
Seq.
R16 0
Ceramic cap 16V 10uF 1206
C11 C24 270pF R1 C26 0.1uF
R20
N/S
Vout (+1.8V) Vout+ 1 C16 C18 22uF C17 22uF 22uF C15 22uF C14 0.1uF Vout1
IR3842A
11
Vcc-
Vcc+
VCC
PGood
R17 10.0K
R4 130 2200pF R2 R6
C8
6
IRDC3842A
Bill of Materials
Ite m
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
Quan tity
2 4 1 1 1 4 1 1 1 1 1 1 1 1 1 1 1 1 1
Part Reference
C2 ,C3 C7 C14 C24 C10 C8 C11 C13 C15 C16 C17 C18 C26 L1 R1 R2 R3 R4 R6 R9 R16 R12 R17 R18 R19 R20
Value
10uF 0.1uF 2200pF 270pF 1uF 22uF 10nF 1.0uH 2.0k 4.99k 3.16k 130 20 23.7K 0 2.67K 10K 49.9k 7.5k Not used IR3842A
Description
10uF,1206,16V, X7R, 20% 0603, 25V, X7R, 10% 0603,50V,X7R, 10% 50V, 0603, NP0, 5% 16V, 0603, X5R, 10% 0805, 6.3V, X5R, 20% 0603, 50V, X7R, 10% 6.86*6.47*5.0mm 0603,1/10W,1% 0603,1/10W,1% 0603,1/10W,1% 0603,1/10W,1% 0603,1/10 W,1% 0603,1/10W,1% 0603,1/10 W,5% 0603,1/10 W,1% 0603,1/10 W,1% 0603,1/10 W,1% 0603,1/10W,1%
Manufacturer
Panasonic - ECG Panasonic Panasonic Murata Murata Panasonic Panasonic Vishay/Dale Rohm Rohm Rohm Panasonic Vishay/Dale Rohm Vishay/Dale Rohm Rohm Rohm Rohm
Part Number
ECJ-3YX1C106K ECJ-1VB1E104K ECJ-1VB1H222K GRM1885C1H271JA01D GRM188R61C105KA93B ECJ-2FB0J226M ECJ-1VB1H103K IHLP2525EZER1R0M01 MCR03EZPFX2001 MCR03EZPFX4991 MCR03EZPFX3161 ERJ-3EKF1300V CRCW060320R0FKEA MCR03EZPFX2372 CRCW06030000Z0EA MCR03EZPFX2671 MCR03EZPFX1002 MCR03EZPFX4992 MCR03EZPFX7501
1
U1
6A SupIRBuck, PQFN 5x6mm
International Rectifier
IR3842AMPbF
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IRDC3842A
TYPICAL OPERATING WAVEFORMS Vin=12.0V, Vcc=5V, Vo=1.8V, Io=0-6A, Room Temperature, No Air Flow
Fig. 7. Start up at 6A Load Ch1:Vin, Ch2:Vo, Ch3:Vss, Ch4:Enable
Fig. 8. Start up at 6A Load, Ch1:Vin, Ch2:Vo, Ch3:Vss, Ch4:VPGood
Fig. 9. Start up with 1.62V Pre Bias, 0A Load, Ch2:Vo, Ch3:VSS
Fig. 10. Output Voltage Ripple, 6A load Ch2: Vo
Fig. 11. Inductor node at 6A load Ch1:LX
Fig. 12. Short (Hiccup) Recovery Ch2:Vo , Ch3:VSS
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IRDC3842A
TYPICAL OPERATING WAVEFORMS Vin=12V, Vcc=5V, Vo=1.8V, Io=0-6A, Room Temperature, No Air Flow
Fig. 13. Transient Response, 3.0A to 6A step 2.5A/s Ch2:Vo; Ch3:Iout (2A/Div)
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IRDC3842A
TYPICAL OPERATING WAVEFORMS Vin=12V, Vcc=5V, Vo=1.8V, Io=6A, Room Temperature, No Air Flow
Fig. 14. Bode Plot at 6A load shows a bandwidth of 107.1KHz and phase margin of 61.2
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IRDC3842A
TYPICAL OPERATING WAVEFORMS Vin=12V, Vcc=5V, Vo=1.8V, Io=0- 6A, Room Temperature, No Air Flow
IR3842A_12Vin_1.8Vout
94 92 90 Efficiency(%) 88 86 84 82 80 0.5 1 1.5 2 2.5 3 3.5 Iout(A) 4 4.5 5 5.5 6
Fig.15: Efficiency versus load current
IR3842A 1.400 1.200 1.000 0.800 0.600 0.400 0.200 0.000 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 Iout(A)
Power Dissipation(w)
Fig.16: Power loss versus load current
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IRDC3842A
THERMAL IMAGE Vin=12V, Vcc=5V, Vo=1.8V, Io=6A, Room Temperature, No Air Flow
Fig. 17: Thermal Image at 6A load Test points 1 and 2 are IR3842A and inductor, respectively.
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IRDC3842A
PCB Metal and Components Placement
Lead lands (the 11 IC pins) width should be equal to nominal part lead width. The minimum lead to lead spacing should be 0.2mm to minimize shorting. Lead land length should be equal to maximum part lead length + 0.3 mm outboard extension. The outboard extension ensures a large and inspectable toe fillet. Pad lands (the 4 big pads other than the 11 IC pins) length and width should be equal to maximum part pad length and width. However, the minimum metal to metal spacing should be no less than 0.17mm for 2 oz. Copper; no less than 0.1mm for 1 oz. Copper and no less than 0.23mm for 3 oz. Copper.
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IRDC3842A
Solder Resist
It is recommended that the lead lands are Non Solder Mask Defined (NSMD). The solder resist should be pulled away from the metal lead lands by a minimum of 0.025mm to ensure NSMD pads. The land pad should be Solder Mask Defined (SMD), with a minimum overlap of the solder resist onto the copper of 0.05mm to accommodate solder resist misalignment. Ensure that the solder resist in-between the lead lands and the pad land is 0.15mm due to the high aspect ratio of the solder resist strip separating the lead lands from the pad land.
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IRDC3842A
Stencil Design
* The Stencil apertures for the lead lands should be approximately 80% of the area of the lead lads. Reducing the amount of solder deposited will minimize the occurrences of lead shorts. If too much solder is deposited on the center pad the part will float and the lead lands will be open. The maximum length and width of the land pad stencil aperture should be equal to the solder resist opening minus an annular 0.2mm pull back to decrease the incidence of shorting the center land to the lead lands when the part is pushed into the solder paste.
*
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IRDC3842A
BOTTOM VIEW
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (320) 252-7105 TAC Fax: (320) 252-7903 This product has been designed and qualified for the Consumer market Visit us at www.irf.com for sales contact information Data and specifications subject to change without notice. 01/10
02/09/10

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